In recent years, high integration and high density in semiconductor device demands smaller and smaller wiring patterns or interconnections and also more and more interconnection layers. Multilayer interconnections in smaller circuits result in greater steps which reflect surface irregularities on lower interconnection layers. An increase in the number of interconnection layers makes film coating performance (step coverage) poor over stepped configurations of thin films. Therefore, better multilayer interconnections need to have the improved step coverage and proper surface planarization. Further, since the depth of focus of a photolithographic optical system is smaller with miniaturization of a photolithographic process, a surface of the semiconductor device needs to be planarized such that irregular steps on the surface of the semiconductor device will fall within the depth of focus.
Thus, in a manufacturing process of a semiconductor device, it increasingly becomes important to planarize a surface of the semiconductor device. One of the most important planarizing technologies is chemical mechanical polishing (CMP). Thus, there has been employed a chemical mechanical polishing apparatus for planarizing a surface of a semiconductor wafer. In the chemical mechanical polishing apparatus, while a polishing liquid containing abrasive particles such as silica (SiO2) or ceria (CeO2) therein is supplied onto a polishing pad, a substrate such as a semiconductor wafer is brought into sliding contact with the polishing pad, so that the substrate is polished.
The above CMP process is performed by using a polishing apparatus comprised of a polishing table having a polishing pad, and a substrate holding device, which is referred to as a carrier or a top ring, for holding a semiconductor wafer (substrate) such that the substrate is held and pressed against the polishing pad under a predetermined pressure by the substrate holding device to polish an insulating film or a metal film on the substrate.
After one or more substrates have been polished, abrasive particles and polishing debris are attached to a surface of the polishing pad, and the surface configuration and the condition of the polishing pad are changed, and thus the polishing performance is deteriorated. Therefore, as the substrates are repeatedly polished, a polishing rate is lowered and non-uniform polishing is caused. Thus, dressing (conditioning) of the polishing pad is performed by using a dresser to regenerate the surface configuration and the condition of the polishing pad which has deteriorated.
As described above, although the dressing (conditioning) of the polishing pad is performed during the process of CMP, the dressing conditions of the polishing pad are determined mainly based on empirical rules. There has not been employed a dressing method which evaluates the surface of the polishing pad quantitatively and then determines the optimum dressing conditions.
Further, in a measuring method of a surface roughness of the polishing pad, the surface roughness indexes, represented by the arithmetical mean deviation of the roughness profile (Ra) or the root mean square deviation of the roughness profile (Rq), are determined by using a laser microscope, but the determined surface roughness indexes show a poor relationship with the CMP polishing performance.
For example, in Japanese Laid-Open Patent Publication Nos. 2005-260185, 2005-333121, and U.S. Patent Application Publication No. 2005/0239380, surface roughnesses of a portion of a polishing pad are specified, but a measuring method of the surface roughness is not clearly described. The present inventors have found from verification that the surface roughness indexes which show a strong relationship with the polishing performance cannot be obtained unless the measuring method is devised.